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Circuit design · Vicena Compute beta

Design and simulate circuits you can inspect.

Explore analog, mixed-signal, sensor, power, and analog-compute systems across operating-point, DC, AC, transient, noise, stability, and tolerance studies—with equations, waveforms, and model limits connected.

Analog and mixed-signal circuits

Transient and frequency response

Model-to-circuit verification

Analog AI · executed ngspice result
Six analog classifier patterns and their simulated neuron voltages

Example study

A tiny AI engine built from currents and voltages.

This real study is simple enough to explain without circuit jargon, but rich enough to exercise architecture, signed-weight encoding, transient behavior, numerical verification, margins, robustness, and provenance.

6 / 6

Patterns classified

Every managed transient case selected the expected class

359.75 mV

Minimum decision margin

Smallest winning-voltage separation in the ngspice result

1.44 mV

Maximum model deviation

Largest analytical-to-simulated score difference

ngspice 45.2

Managed solver

2,644 parsed transient samples with job provenance

01

System goal

Describe the intelligence in plain language

The goal is easy to understand: four sensor values enter a tiny analog engine, three candidate classes compete, and the highest voltage becomes the prediction.

02

Architecture

Encode signed weights physically

Positive and negative weights become paired conductances in a differential resistive crossbar. Current summation performs the dot products in the circuit itself.

03

Circuit model

Build one inspectable netlist

Vicena collapses the crossbar, finite-gain transimpedance amplifiers, pulse sequence, measurements, and outputs into a self-contained ngspice input.

04

Managed compute

Run the real transient inference

One managed job applies six time-multiplexed sensor patterns and records all three neuron voltages as the circuit settles and changes its decision.

05

Evidence

Verify every decision

The notebook compares expected and simulated class scores, checks the winning class, measures decision margins, and quantifies model deviation instead of showing only a plausible waveform.

06

Next design

Explore robustness and energy

Analytical sensitivity studies vary resistor tolerance and inference time to reveal which conclusions came from the remote solver and which are design estimates.

Real workflow artifacts

See the circuit think.

The figures connect the physical architecture to the changing input pattern, competing class voltages, numerical reference, and design limits. They come from one executed analysis record—not disconnected marketing illustrations.

Traceable outputs
Transient input and neuron-voltage traces for six analog classifier patterns

Six classifications in one transient run

The upper panel shows the changing sensor pattern; the lower panel shows the three physical neuron voltages competing over time.

Heatmap of signed weights encoded by a differential resistive crossbar

Signed weights become physical conductances

Persimmon and saffron identify the +1 and −1 differential-conductance encoding for every sensor-to-class connection.

Analytical resistor-tolerance robustness and energy-latency tradeoff plots

Design tradeoffs, clearly separated from simulation

The tolerance and energy panels are analytical follow-on studies—not remote Monte Carlo or transistor-level power results. That distinction stays attached to the figure.

Expected and ngspice-simulated analog classifier scores and decision margins

Expected mathematics meets simulated electronics

Analytical and ngspice score maps agree within 1.44 mV, while all six winner margins remain visible rather than hidden behind an accuracy number.

Scientific packages

The scientific packages behind circuit simulation and analysis.

  1. ngspice

    45.2

    Circuit simulation

    Runs operating-point, DC, AC, transient, noise, Fourier, and measurement-driven analyses for analog and mixed-signal circuits.

  2. DEVSIM

    2.10

    Device-to-circuit modeling

    Connects semiconductor-device physics to electrical characteristics that can inform compact models and circuit studies.

  3. NumPy / SciPy

    Numerical verification

    Checks equations, parses solver outputs, compares expected and simulated behavior, and supports parameter and sensitivity studies.

  4. JupyterLab

    Inspectable analysis

    Keeps circuit inputs, equations, waveforms, tables, plots, limitations, and follow-up calculations in a reusable notebook.

Scientific capabilities

From one amplifier to complete analog systems.

Vicena can reuse reliable circuit workflows for familiar tasks, then build a bounded new study when the topology, model, or measurement is different.

Analog and mixed-signal circuits

Explore amplifiers, filters, oscillators, converters, sensor front ends, power stages, and architecture-level analog computing.

Transient and frequency response

Run operating-point, DC, AC, transient, noise, Fourier, and measurement-driven studies with inspectable waveforms.

Model-to-circuit verification

Compare expected equations with simulated voltages, currents, decisions, margins, settling, and sensitivity.

Design-space exploration

Study component values, tolerances, bandwidth, energy, stability, sensing range, and competing circuit architectures.

Evidence discipline

A decision backed by voltages, margins, and provenance.

The headline is six correct classifications. The scientific value is that every intermediate score, expected value, margin, model assumption, solver version, and artifact can still be inspected.

The managed run completed as Vicena job lcb1d06dbeca9daa83bb2f31da3c20d3b1 with ngspice 45.2.
The self-contained input is identified by SHA-256 6c8552b7b41f0e4eca64b24b3adee28377dfdbbc174b03dd69a8aee5e86cd00d.
All six expected classes, all three simulated score traces, 2,644 samples, and every decision margin remain available in the executed notebook.
Remote simulation, analytical reference calculations, and analytical sensitivity estimates are labeled separately.

Scientific boundary

Architecture proof, not silicon.

! This is an architecture-level analog-compute proof of concept, not a tapeout-ready AI chip.
! The amplifier is a finite-gain behavioral model. The study does not include transistor-level PDK behavior, parasitics, device noise, mismatch, or corners.
! The resistor-tolerance Monte Carlo and energy curves are analytical studies, not additional managed ngspice sweeps or measured silicon.
! Programming circuitry, physical winner-selection comparators, layout, extraction, timing closure, manufacturability, and silicon validation remain future work.

Start with your design

What should the circuit sense, control, or compute?

Describe the function and constraints. Vicena can turn them into a model, run the appropriate analysis, and return both the visual result and the evidence behind it.